Magnetoresistive RAM (MRAM)
- “A Magnetic Moment: Prospects of MRAM Technology, Markets, and Applications”, Forward Insights, 2013
- “MRAM - The Future of Non-Volatile Memory” - Portable Design, July 2008
- “Die Zukunft des NV-RAM ist magnetisch” - Elektronik Informationen, Oct 2007
Memory Survey Articles and Presentations
- “Choosing a Memory Solution” - Electronic Products, Nov 2002
- Memory Tutorial for US Patent Office Patent Examiners, Oct 2000
- “DRAM I/Os Proliferate as Old Standards Fall” - Electronic Products, May 2000
- “New DRAMs Aim to Ease Main Memory Bottlenecks” - Electronic Products, May 1997
- “High Performance DRAMs” - Electronic Products, June 1993
High Performance DRAM & 1T-SRAM
- “One Transistor Enhanced SRAM Improves Network Performance” - International IC Conference, China” - September 2002
- “Next Generation Memory Technology” - Panel Discussion at Microprocessor Forum, October 2000
- “ESDRAM-Lite: Low cost, Direct Mapped Cache for DDR & DDRII SDRAM” - Platform 2000, San Jose, Jan 2000
- “PC133 and Beyond - SDRAM Supersets” - Platform 1999, San Jose, July 1999
- “Low Latency DRAM Upgrades Sub-$1000 PC Performance” - Multimedia Technology Conference & Exhibition, Taipei, Dec 1998
- “Erst High-End ermoglicht Low-cost” - Megalink, Dec 1998
- “Der Speichertrick” - Electronik Aktuell, Dec 1998
- “Schnellere Speicher - Weniger Aufwand” - Electronik Magazine, Dec 22, 1998
- “SDRAM Compatibility, Burst SRAM Performance” - Components in Electronics, Jul-Aug 1998
- “Improving SDRAM Latency with Enhanced SDRAM” - DesignCon 98 Proceedings, Jan 1998
- “Alternatives for Next-Generation DRAMs” - Panel Discussion, Microprocessor Forum, Oct 1997
- “Data Latency Limits Sustained Bandwidth” - IEEE Mesa Computer Elements Workshop, Jan 1997
- “Multimedia Notebooks Going Cacheless” - EE Times, Feb 1996
- “One-chip FLEXLogic Controller Ties Pentium Processor to Enhanced DRAM” - Special Supplement to EE Times, Feb 1995
- “Dynamicache Optimizes Multitasking Performance” - ECN Magazine, Jan 1995
- “Ausweg aus de Wareschleife” - Electronik, July 1994
- “Low Latency EDRAM Main Memory Subsystem for 66 MHz Bus Operation” - Compcon 94 Proceedings, Jan 1994
- “Enhanced DRAM for Fast Embedded Designs” - Electronic Products Design, Jan 1994
- “Cacheless Fast DRAM Memory System Improves 486DX2-66 System Performance” - Silicon Valley PC Design Conference Proceedings, July 1993
- “EDRAM Accelerates High Performance Embedded Computer Applications” - Embedded Computer Conference, April 1993
- “Enhanced DRAM Integrates SRAM Cache and Fast DRAM Memory System on One Chip” - Wescon 92 Proceedings, Nov 1992
- “Enhanced Dynamic RAM” - IEEE Spectrum, Oct 1992
- “15 nsec Enhanced DRAM Upgrades System Performance in 72-pin SIMM Socket” - Silicon Valley PC Design Conference Proceedings, July 1992
- “Ferroelectric RAM Technology Overview & Status” - Office of the Undersecretary of Defense, Advisory Group on Electronic Devices, Nov 14, 1995
- “1 Transistor, 1 Capacitor Formula is Applied to 256K FRAM” - Nikkei Microdevices, May 1992
- “Critical Data Storage Defines Memory Technologies” - EE Times, Nov 18, 1991
- “Ferroelectric RAM has DRAM Benefits Without the Volatility, FRAM has the Nonvolatility of EEPROM” - Canadian Electronics, Jun 1991
- “Ferroelectric Memory Evaluation and Development System” - NAECON 1991, May 1991
- “Ferroelectric Memory Evaluation and Development System” - Third International Symposium on Integrated Ferroelectrics, April 1991
- “Ferroelectric RAM Technology” - Memory Card Systems & Design, Jan 1991
- “Designing with FRAM Technology” - 1990 EE Times Memory Design Guide, 1990
- “Ferroelectric RAM Memory Family for Critical Data Storage” - Ferroelectrics, Vol. 112, 1990
- “Ferroelectrics for Nonvolatile RAMs” - IEEE Spectrum, July 1989
- “Ferroelectronic RAM Memory Family for Critical Data Storage” - First Symposium on Integrated Ferroelectrics Proceedings, March 1989
Computer-Aided Design (CAD)
- “Design Automation System Strategic Alternatives” - Consulting Study for Technomics Consultants, August 1987
- “Advanced Auto-placement Software for a 20K CMOS Sea of Gates Array Using Parametric and Super Macrocells” - Custom Integrated Circuits Conference, May 1987
- “Digital Product Center Gate Array Design Automation Strategy” - Honeywell Microelectronics Conference, Oct 1986
- “The HC20,000: A Fast 20K Gate Array with Built-in Self-Test and System Fault Isolation Capabilities” - Custom Integrated Circuits Conference, May 1986
- “A High Speed Arbiter for Resource Management in Distributed Computer Systems” - NAECON 85 Proceedings, May 1985
- “A High Speed Arbiter for Resource Management in Distributed Computer Systems” - Custom Integrated Circuits Conference, May 1985
- “FFT Arithmetic Element Built on VLSI High Performance Gate Array” - IEEE Conference on Acoustics, Speech, and Signal Processing, March 1985
- “The Honeywell HE2000: A Low Power 300 ps ECL Compatible Gate Array” - Northcon 1984 Proceeding, 1984
- The HT5000: A VLSI Sub-nanosecond TTL Gate Array” - Custom Integrated Circuit Conference, May 1984
- “The VLSI-HAP Data Processor” - Honeywell SSED Newsletter, Dec 1982
- “A High Performance Configurable Microprocessor” - VLSI Design Magazine, Nov-Dec 1982
- “Architecture Trade-offs for a Single Chip Microcomputer” - Honeywell Microelectronics Conference, Sept 1982
- “VLSI-HAP: A Bipolar Array Processor Chip Set” - Custom Integrated Circuits Conference Proceedings, May 1982
- “A CML 16-bit Microprocessor” - Honeywell VLSI Conference, September 1981
- “Sensor Processing System” - NAECON 80 Proceedings, May 1980
- “Sensor Processing Element” - Sperry Interdivisional Signal Processing Conference, May 1979
- “Sensor Processing Element” - GOMAC 78 Digest