Summary Resume for David Bondurant
2009-Present - Vertical Memory, President & Principal Analyst
Consults with major semiconductor companies and Wall Street investment analysts on stand-alone & embedded volatile & non-volatile memory technologies & companies. Partnered with Forward Insights to publish MRAM market research report.
2023-Present - IEEE Pikes Peak Section Chairman
IEEE Section covering Southern Colorado with 700+ professional & student members, 5 Society Chapters
2020-Present - IEEE Computer Society Regional Coordinator, Chair of Geographical Activities Committee, and Vice-Chair of Member and Geographic Activities Board.
Initially Computer Society region coordinator for regions 5 & 6 covering West and Southwest US. In 2022, became Chair of Geographical Activities Committee and Vice-Chair of the MGA Board. Working with 240+ Computer Society professional chapters and 500+ Computer Society student branch chapters worldwide through 7 region coordinators.
2019-Present - IEEE Life Member, Pikes Peak Life Member Affinity Group Chair, area & region coordinator in Region 5, member of Life Member Committee and LMAG Activities Committee Chair
Volunteering with IEEE after becoming a Life Senior Member. Chair of local Pikes Peak LMAG, area and region coordinator of Life Members in Southwest USA, member of Life Member Committee representing all Life Members worldwide, since 2020 have been LMAG Activities Chair, managing 138 LMAG worldwide through 10 Regional Coordinators.
2016 - Instantaneous Technologies, CEO
Developed business plan for mixed signal start-up company with revolutionary Instantaneous Loop, a Phase Lock Loop with nanosecond lock time
2012-2013 - Ironwood Electronics, Southwest Applications Manager
Consulting with customers to specify high performance socket & test adapter solutions for semiconductor & system product verification, product characterization, production test, burn-in.
2008-2009 - Everspin Technologies - Director of Marketing
Launched the world’s first commercial MRAM company. Defined product roadmap with serial & parallel MRAM products. Developed website & collateral. Captured key wins in enterprise storage, industrial automation, gaming, and avionics markets
2007-2008 - Freescale Semiconductor, Micro-controller Solutions Group - Global MRAM Product Manager
Expanded MRAM product family, developed collateral, promoted products worldwide. Captured first embedded MRAM program. Developed business plan for Everspin and captured key investors.
2006-2007 - Simtek Corporation, Technical Marketing Manager
Grew nvSRAM business from $10M to $30M in one year. Definition and preliminary marketing of 4Mb nvSRAM products. Liaison with foundry and development partner, Cypress Semiconductors
2002-2006 - Vertical Memory, President & Principal Analyst
Consulted with major semiconductor companies and Wall Street investment analysts on stand-alone & embedded volatile & non-volatile memory technologies & companies
2002-2004 - MBA in Technical Management, University of Phoenix
1988-2002 - Ramtron International & Enhanced Memory Systems, VP of Marketing & Applications
Developed strategic product roadmap for the world’s leading ferroelectric RAM (FRAM) company and won a strategic program with Seiko-Epson for development of the first 1T-1C FRAM. Helped define several generations on high performance DRAM and 1T-SRAM products at Ramtron subsidiary Enhanced Memory Systems including EDRAM, ESDRAM, DDR ESDRAM, HSDRAM, and ESRAM. Grew Enhanced business to $16M. Acquired Mushkin memory module business. Partnered with Cypress Semiconductors and Hewlett-Packard to develop 72Mb ESRAM for communications & computer cache applications
1984 - 1988 Honeywell Digital Product Center, Commercial Business Development Manager
Created ASIC subsidiary of Honeywell Solid State Electronics Division that grew to $62M in three years and became the 8th largest ASIC supplier at the time. Won major ASIC programs at ETA Systems, Honeywell, and Honeywell Bull (more than 300 custom chips developed). Managed CMOS Gate Array, Gate Array Computer-aided Design, and Design Center Groups
1980 -1984 - Honeywell Solid State Electronics Center, Manager of VHSIC System Applications
Marketed Honeywell VHSIC and rad hard CMOS technology to Honeywell divisions and outside companies. Developed business plan for Digital Product Center subsidiary. Manager of VHSIC CAD software development. Chipset architect for Honeywell-Motorola VHSIC sub-micron program. CMOS microprocessor design manager that led team developing CMOS Z-8 microprocessor, memory, and I/O cells for custom residential chips. Principal bipolar designer who developed 8-bit and 16-bit CML 2901 microprocessors and 5K gate array used in Honeywell Array Processor (HAP). Developed CML Gate Arrays for an Air Force Cruise Missile Navigation System.
1976-1980 - Sperry-Univac Defense Systems, Principal Computer Engineer
Chipset architect for the successful Sperry-Univac, TRW, Motorola VHSIC Phase 0 proposal. Developed a 32-bit B-1 Avionics computer for Boeing. Developed the first Mil-Std-1553B avionics serial multiplex bus prototype for Air Force Seafac Lab. Defined and developed 16 processor SIMD sonar & radar processor called Signal Processing Element (SPE).
1975-1976 - Robershaw Controls, Senior Project Engineer
Developed a metro area distributed control terminal network using Motorola 6800 microprocessor and modem communication. Consulted with Robertshaw Lux Time Division to create microwave oven controller using Rockwell 4-bit microprocessor.
1972-1975 - Sperry-Univac Defense Systems, Senior Computer Engineer
Developed packet & circuit switch processors for McAutoNet with Sperry Communications division. Developed Trident Navigation System (CP-890B) and took through system qualification testing. Developed microprogrammed 32-bit I/O controller and magnetic disk controller demonstrations for Trident SPO using SHP modules.
1971-72 - Control Data Corporation, Associate Memory Design Engineer
Participated in the development of first DRAM memory subsystem for a CDC supercomputer using 1Kb PMOS memory and ECL I/O circuitry. Developed DRAM Memory Module Tester using ECL IC logic. Worked on high speed (70 ns) core memory subsystem for CDC supercomputer I/O.
1971 - BS in Electrical Engineering, Missouri University of Science & Technology and BS in Physics from Truman State University
Completed dual degree 5-year program with Truman State University & Missouri S&T
IEEE Computer Society Distinguished Contributor (2022), Retired Registered Professional Engineer (MN), Licensed Amateur Radio Operator (N0DB) and member of Amateur Radio Relay League (ARRL) for 60-years, Life Senior Member IEEE, IEEE Computer Society, Tau Beta Pi, Eta Kappa Nu, Phi Kappa Phi, Blue Key, Kappa Mu Epsilon, Sigma Phi, Alpha Phi Sigma, Alpha Phi Omega